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1 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 C + r6 499 lt6202 v s + v out in + in C + C 1/2 lt6231 v s C v s + C + 1/2 lt6231 r7 499 r4 499 r2 196 r1 10 r3 196 r5 499 623012 ta01a a v = 40 bw = 5.1mhz v s = 1.5v to 5v i s = 10ma e n = 5.8 v rms input referred, measurement bw = 8mhz v s C n ultrasound amplifiers n low noise, low power signal processing n active filters n driving a/d converters n rail-to-rail buffer amplifiers n low noise voltage: 1.1nv/ ? hz n low supply current: 3.5ma/amp max n low offset voltage: 350 m v max n gain bandwidth product: lt6230: 215mhz; a v 3 1 LT6230-10: 1450mhz; a v 3 10 n wide supply range: 3v to 12.6v n output swings rail-to-rail n common mode rejection ratio 115db typ n output current: 30ma n operating temperature range C 40 c to 85 c n lt6230 shutdown to 10 m a maximum n lt6230/LT6230-10 in sot-23 package n dual lt6231 in 8-pin so and tiny dfn packages n lt6232 in 16-pin ssop package applicatio s u features typical applicatio u descriptio u 215mhz, rail-to-rail output, 1.1nv/ ? hz, 3.5ma op amp family , ltc and lt are registered trademarks of linear technology corporation. the lt ? 6230/lt6231/lt6232 are single/dual/quad low noise, rail-to-rail output unity gain stable op amps that feature 1.1nv/ ? hz noise voltage and draw only 3.5ma of supply current per amplifier. these amplifiers combine very low noise and supply current with a 215mhz gain bandwidth product, a 70v/ m s slew rate and are optimized for low supply voltage signal conditioning systems. the LT6230-10 is a single amplifier optimized for higher gain applications resulting in higher gain bandwidth and slew rate. the lt6230 and LT6230-10 include an enable pin that can be used to reduce the supply current to less than 10 m a. the amplifier family has an output that swings within 50mv of either supply rail to maximize the signal dynamic range in low supply applications and is specified on 3.3v, 5v and 5v supplies. the e n ? ? i supply product of 1.9 per amplifier is among the most noise efficient of any op amp. the lt6230/LT6230-10 is available in the 6-lead sot-23 package and the lt6231 dual is available in the 8-pin so package with standard pinouts. for compact layouts, the dual is also available in a tiny dual fine pitch leadless package (dfn). the lt6232 is available in the 16-pin ssop package. lt6230/LT6230-10/ lt6231/lt6232 noise voltage and unbalanced noise current vs frequency low noise low power instrumentation amplifier frequency (hz) noise voltage (nv/ hz) 6 5 4 3 2 1 0 10 1k 10k 100k 623012 ta01b 100 v s = 2.5v t a = 25 c v cm = 0v noise voltage noise current unbalanced noise current (pa/ hz) 6 5 4 3 2 1 0
lt6230/LT6230-10/ lt6231/lt6232 2 sn623012 623012fas total supply voltage (v + to v C ) ............................ 12.6v input current (note 2) ........................................ 40ma output short-circuit duration (note 3) ............ indefinite operating temperature range (note 4) ...C40 c to 85 c specified temperature range (note 5) ....C40 c to 85 c absolute axi u rati gs w ww u package/order i for atio uu w (note 1) junction temperature ........................................... 150 c junction temperature (dd package) ................... 125 c storage temperature range ..................C65 c to 150 c storage temperature range (dd package) ...................................... C 65 c to 125 c lead temperature (soldering, 10 sec).................. 300 c t jmax = 150 c, q ja = 200 c/w 6231 6231i lt6231cs8 lt6231is8 *the temperature grade is identified by a label on the shipping container.c onsult ltc marketing for parts specified with wider operating temperature ranges. order part number s6 part marking* ltafj ltafk lt6230cs6 lt6230is6 lt6230cs6-10 lt6230is6-10 order part number dd part marking* laeu lt6231cdd lt6231idd t jmax = 125 c, q ja = 160 c/w underside metal connected to v C (pcb connection optional) t jmax = 150 c, q ja = 250 c/w s8 part marking order part number 6232 6232i lt6232cgn lt6232ign gn part marking order part number t jmax = 150 c, q ja = 135 c/w top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 4 3 2 1 out a ?n a +in a v v + out b ?n b +in b + + 6 v + 5 enable 4 Cin out 1 top view s6 package 6-lead plastic tsot-23 v C 2 +in 3 top view v + out b ?n b +in b out a in a +in a v s8 package 8-lead plastic so 1 2 3 4 8 7 6 5 + + top view gn package 16-lead narrow plastic ssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 out a in a +in a v + +in b in b out b nc out d in d +in d v +in c in c out c nc + + + + a d bc
3 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 electrical characteristics t a = 25 c, v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage lt6230s6, lt6230s6-10 100 500 m v lt6231s8, lt6232gn 50 350 m v lt6231dd 75 450 m v input offset voltage match 100 600 m v (channel-to-channel) (note 6) i b input bias current 510 m a i b match (channel-to-channel) (note 6) 0.1 0.9 m a i os input offset current 0.1 0.6 m a input noise voltage 0.1hz to 10hz 180 nv p-p e n input noise voltage density f = 10khz, v s = 5v 1.1 1.7 nv/ ? hz i n input noise current density, balanced source f = 10khz, v s = 5v, r s = 10k 1 pa/ ? hz unbalanced source f = 10khz, v s = 5v, r s = 10k 2.4 pa/ ? hz input resistance common mode 6.5 m w differential mode 7.5 k w c in input capacitance common mode 2.9 pf differential mode 7.7 pf a vol large-signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k to v s /2 105 200 v/mv r l = 1k to v s /2 21 40 v/mv v o = 1v to 4v, r l = 100 w to v s /2 5.4 9 v/mv v s = 3.3v, v o = 0.65v to 2.65v, r l = 10k to v s /2 90 175 v/mv r l = 1k to v s /2 16.5 32 v/mv v cm input voltage range guaranteed by cmrr, v s = 5v, 0v 1.5 4 v v s = 3.3v, 0v 1.15 2.65 v cmrr common mode rejection ratio v s = 5v, v cm = 1.5v to 4v 90 115 db v s = 3.3v, v cm = 1.15v to 2.65v 90 115 db cmrr match (channel-to-channel) (note 6) v s = 5v, v cm = 1.5v to 4v 84 120 db psrr power supply rejection ratio v s = 3v to 10v 90 115 db psrr match (channel-to-channel) (note 6) v s = 3v to 10v 84 115 db minimum supply voltage (note 7) 3 v v ol output voltage swing low (note 8) no load 4 40 mv i sink = 5ma 85 190 mv v s = 5v, i sink = 20ma 240 460 mv v s = 3.3v, i sink = 15ma 185 350 mv v oh output voltage swing high (note 8) no load 5 50 mv i source = 5ma 90 200 mv v s = 5v, i source = 20ma 325 600 mv v s = 3.3v, i source = 15ma 250 400 mv i sc short-circuit current v s = 5v 30 45 ma v s = 3.3v 25 40 ma i s supply current per amplifier 3.15 3.5 ma disabled supply current per amplifier enable = v + C 0.35v 0.2 10 m a
lt6230/LT6230-10/ lt6231/lt6232 4 sn623012 623012fas symbol parameter conditions min typ max units i enable enable pin current enable = 0.3v C25 C75 m a v l enable pin input voltage low 0.3 v v h enable pin input voltage high v + C 0.35v v output leakage current enable = v + C 0.35v, v o = 1.5v to 3.5v 0.2 10 m a t on turn-on time enable = 5v to 0v, r l = 1k, v s = 5v 300 ns t off turn-off time enable = 0v to 5v, r l = 1k, v s = 5v 41 m s gbw gain bandwidth product frequency = 1mhz, v s = 5v 200 mhz LT6230-10 1300 mhz sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 1.5v to 3.5v 42 60 v/ m s LT6230-10, v s = 5v, a v = C10, r l = 1k, 250 v/ m s v o = 1.5v to 3.5v fpbw full power bandwidth v s = 5v, v out = 3v p-p (note 9) 4.8 6.3 mhz LT6230-10, hd 2 = hd 3 = 1% 11 mhz t s settling time (lt6230, lt6231, lt6232) 0.1%, v s = 5v, v step = 2v, a v = C1, r l = 1k 55 ns t a = 25 c, v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. the l denotes the specifications which apply over 0 c < t a < 70 c temperature range. v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage lt6230s6, lt6230s6-10 l 600 m v lt6231s8, lt6232gn l 450 m v lt6231dd l 550 m v input offset voltage match l 800 m v (channel-to-channel) (note 6) v os tc input offset voltage drift (note 10) v cm = half supply l 0.5 3 m v/ c i b input bias current l 11 m a i b match (channel-to-channel) (note 6) l 1 m a i os input offset current l 0.7 m a a vol large-signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k to v s /2 l 78 v/mv r l = 1k to v s /2 l 17 v/mv v o = 1v to 4v, r l = 100 w to v s /2 l 4.1 v/mv v s = 3.3v, v o = 0.65v to 2.65v, r l = 10k to v s /2 l 66 v/mv r l = 1k to v s /2 l 13 v/mv v cm input voltage range guaranteed by cmrr, v s = 5v, 0v l 1.5 4 v v s = 3.3v, 0v l 1.15 2.65 v cmrr common mode rejection ratio v s = 5v, v cm = 1.5v to 4v l 90 db v s = 3.3v, v cm = 1.15v to 2.65v l 85 db cmrr match (channel-to-channel) (note 6) v s = 5v, v cm = 1.5v to 4v l 84 db psrr power supply rejection ratio v s = 3v to 10v l 85 db psrr match (channel-to-channel) (note 6) v s = 3v to 10v l 79 db minimum supply voltage (note 7) l 3v v ol output voltage swing low (note 8) no load l 50 mv i sink = 5ma l 200 mv v s = 5v, i sink = 20ma l 500 mv v s = 3.3v, i sink = 15ma l 380 mv electrical characteristics
5 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 the l denotes the specifications which apply over 0 c < t a < 70 c temperature range. v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. the l denotes the specifications which apply over C 40 c < t a < 85 c temperature range. v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage lt6230s6, lt6230s6-10 l 700 m v lt6231s8, lt6232gn l 550 m v lt6231dd l 650 m v input offset voltage match l 1000 m v (channel-to-channel) (note 6) v os tc input offset voltage drift (note 10) v cm = half supply l 0.5 3 m v/ c i b input bias current l 12 m a i b match (channel-to-channel) (note 6) l 1.1 m a i os input offset current l 0.8 m a a vol large-signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k to v s /2 l 72 v/mv r l = 1k to v s /2 l 16 v/mv v o = 1v to 4v, r l = 100 w to v s /2 l 3.6 v/mv v s = 3.3v, v o = 0.65v to 2.65v,r l = 10k to v s /2 l 60 v/mv r l = 1k to v s /2 l 12 v/mv v cm input voltage range guaranteed by cmrr, v s = 5v, 0v l 1.5 4 v v s = 3.3v, 0v l 1.15 2.65 v cmrr common mode rejection ratio v s = 5v, v cm = 1.5v to 4v l 90 db v s = 3.3v, v cm = 1.15v to 2.65v l 85 db cmrr match (channel-to-channel) (note 6) v s = 5v, v cm = 1.5v to 4v l 84 db psrr power supply rejection ratio v s = 3v to 10v l 85 db symbol parameter conditions min typ max units v oh output voltage swing high (note 8) no load l 60 mv i source = 5ma l 215 mv v s = 5v, i source = 20ma l 650 mv v s = 3.3v, i source = 15ma l 430 mv i sc short-circuit current v s = 5v l 25 ma v s = 3.3v l 20 ma i s supply current per amplifier l 4.2 ma disabled supply current per amplifier enable = v + C 0.25v l 1 m a i enable enable pin current enable = 0.3v l C85 m a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l v + C 0.25v v output leakage current enable = v + C 0.25v, v o = 1.5v to 3.5v l 1 m a t on turn-on time enable = 5v to 0v, r l = 1k, v s = 5v l 300 ns t off turn-off time enable = 0v to 5v, r l = 1k, v s = 5v l 65 m s sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 1.5v to 3.5v l 35 v/ m s LT6230-10, a v = C10, r l = 1k, l 225 v/ m s v o = 1.5v to 3.5v fpbw full power bandwidth (note 9) v s = 5v, v out = 3v p-p l 3.7 mhz lt6230, lt6231, lt6232 electrical characteristics
lt6230/LT6230-10/ lt6231/lt6232 6 sn623012 623012fas symbol parameter conditions min typ max units v os input offset voltage lt6230, LT6230-10 100 500 m v lt6231s8, lt6232gn 50 350 m v lt6231dd 75 450 m v input offset voltage match 100 600 m v (channel-to-channel) (note 6) i b input bias current 510 m a i b match (channel-to-channel) (note 6) 0.1 0.9 m a i os input offset current 0.1 0.6 m a input noise voltage 0.1hz to 10hz 180 nv p-p e n input noise voltage density f = 10khz 1.1 1.7 nv/ ? hz i n input noise current density, balanced source f = 10khz, r s = 10k 1 pa/ ? hz unbalanced source f = 10khz, r s = 10k 2.4 pa/ ? hz symbol parameter conditions min typ max units psrr match (channel-to-channel) (note 6) v s = 3v to 10v l 79 db minimum supply voltage (note 7) l 3v v ol output voltage swing low (note 8) no load l 60 mv i sink = 5ma l 210 mv v s = 5v, i sink = 15ma l 510 mv v s = 3.3v, i sink = 15ma l 390 mv v oh output voltage swing high (note 6) no load l 70 mv i source = 5ma l 220 mv v s = 5v, i source = 20ma l 675 mv v s = 3.3v, i source = 15ma l 440 mv i sc short-circuit current v s = 5v l 15 ma v s = 3.3v l 15 ma i s supply current per amplifier l 4.4 ma disabled supply current per amplifier enable = v + C 0.2v l 1 m a i enable enable pin current enable = 0.3v l C100 m a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l v + C 0.2v v output leakage current enable = v + C 0.2v, v o = 1.5v to 3.5v l 1 m a t on turn-on time enable = 5v to 0v, r l = 1k, v s = 5v l 300 ns t off turn-off time enable = 0v to 5v, r l = 1k, v s = 5v l 72 m s sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 1.5v to 3.5v l 31 v/ m s LT6230-10, a v = C10, r l = 1k, l 185 v/ m s v o = 1.5v to 3.5v fpbw full power bandwidth (note 9) v s = 5v, v out = 3v p-p l 3.3 mhz lt6230, lt6231, lt6232 electrical characteristics the l denotes the specifications which apply over C 40 c < t a < 85 c temperature range. v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. (note 5) t a = 25 c, v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted.
7 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 symbol parameter conditions min typ max units input resistance common mode 6.5 m w differential mode 7.5 k w c in input capacitance common mode 2.4 pf differential mode 6.5 pf a vol large-signal gain v o = 4.5v, r l = 10k 140 260 v/mv r l = 1k 35 65 v/mv v o = 2v, r l = 100 w 8.5 16 v/mv v cm input voltage range guaranteed by cmrr C3 4 v cmrr common mode rejection ratio v cm = C3v to 4v 95 120 db cmrr match (channel-to-channel) (note 6) v cm = C3v to 4v 89 125 db psrr power supply rejection ratio v s = 1.5v to 5v 90 115 db psrr match (channel-to-channel) (note 6) v s = 1.5v to 5v 84 115 db v ol output voltage swing low (note 8) no load 4 40 mv i sink = 5ma 85 190 mv i sink = 20ma 240 460 mv v oh output voltage swing high (note 8) no load 5 50 mv i source = 5ma 90 200 mv i source = 20ma 325 600 mv i sc short-circuit current 30 ma i s supply current per amplifier 3.3 3.9 ma disabled supply current per amplifier enable = 4.65v 0.2 m a i enable enable pin current enable = 0.3v C35 C85 m a v l enable pin input voltage low 0.3 v v h enable pin input voltage high 4.65 v output leakage current enable = v + C 4.65v, v o = 1v 0.2 10 m a t on turn-on time enable = 5v to 0v, r l = 1k 300 ns t off turn-off time enable = 0v to 5v, r l = 1k 62 m s gbw gain bandwidth product frequency = 1mhz 150 215 mhz LT6230-10 1000 1450 mhz sr slew rate a v = C1, r l = 1k, v o = C2v to 2v 50 70 v/ m s LT6230-10, a v = C10, r l = 1k, v o = C2v to 2v 320 v/ m s fpbw full power bandwidth v out = 3v p-p (note 9) 5.3 7.4 mhz LT6230-10, hd2 = hd3 1% 11 mhz t s settling time (lt6230, lt6231, lt6232) 0.1%, v step = 2v, a v = C1, r l = 1k 50 ns t a = 25 c, v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted. electrical characteristics
lt6230/LT6230-10/ lt6231/lt6232 8 sn623012 623012fas symbol parameter conditions min typ max units v os input offset voltage lt6230s6, lt6230s6-10 l 600 m v lt6231s8, lt6232gn l 450 m v lt6231dd l 550 m v input offset voltage match l 800 m v (channel-to-channel) (note 6) v os tc input offset voltage drift (note 10) l 0.5 3 m v/ c i b input bias current l 11 m a i b match (channel-to-channel) (note 6) l 1 m a i os input offset current l 0.7 m a a vol large-signal gain v o = 4.5v, r l = 10k l 100 v/mv r l = 1k l 27 v/mv v o = 2v, r l = 100 w l 6v/mv v cm input voltage range guaranteed by cmrr l C3 4 v cmrr common mode rejection ratio v cm = C3v to 4v l 95 db cmrr match (channel-to-channel) (note 6) v cm = C3v to 4v l 89 db psrr power supply rejection ratio v s = 1.5v to 5v l 85 db psrr match (channel-to-channel) (note 6) v s = 1.5v to 5v l 79 db v ol output voltage swing low (note 8) no load l 50 mv i sink = 5ma l 200 mv i sink = 20ma l 500 mv v oh output voltage swing high (note 8) no load l 60 mv i source = 5ma l 215 mv i source = 20ma l 650 mv i sc short-circuit current l 25 ma i s supply current per amplifier l 4.6 ma disabled supply current per amplifier enable = 4.75v l 1 m a i enable enable pin current enable = 0.3v l C95 m a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l 4.75 v output leakage current enable = 4.75v, v o = 1v l 1 m a t on turn-on time enable = 5v to 0v, r l = 1k l 300 ns t off turn-off time enable = 0v to 5v, r l = 1k l 85 m s sr slew rate a v = C1, r l = 1k, v o = C2v to 2v l 44 v/ m s LT6230-10, a v = C10, r l = 1k, v o = C2v to 2v l 315 v/ m s fpbw full power bandwidth v out = 3v p-p (note 9) l 4.66 mhz lt6230, lt6231, lt6232 the l denotes the specifications which apply over 0 c < t a < 70 c temperature range. v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted. electrical characteristics
9 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 symbol parameter conditions min typ max units v os input offset voltage lt6230, LT6230-10 l 700 m v lt6231s8, lt6232gn l 550 m v lt6231dd l 650 m v input offset voltage match l 1000 m v (channel-to-channel) (note 6) v os tc input offset voltage drift (note 10) l 0.5 3 m v/ c i b input bias current l 12 m a i b match (channel-to-channel) (note 6) l 1.1 m a i os input offset current l 0.8 m a a vol large-signal gain v o = 4.5v, r l = 10k l 93 v/mv r l = 1k l 25 v/mv v o = 1.5v, r l = 100 w l 4.8 v/mv v cm input voltage range guaranteed by cmrr l C3 4 v cmrr common mode rejection ratio v cm = C3v to 4v l 95 db cmrr match (channel-to-channel) (note 6) v cm = C3v to 4v l 89 db psrr power supply rejection ratio v s = 1.5v to 5v l 85 db psrr match (channel-to-channel) (note 6) v s = 1.5v to 5v l 79 db v ol output voltage swing low (note 8) no load l 60 mv i sink = 5ma l 210 mv i sink = 15ma l 510 mv v oh output voltage swing high (note 8) no load l 70 mv i source = 5ma l 220 mv i source = 20ma l 675 mv i sc short-circuit current l 15 ma i s supply current per amplifier l 4.85 ma disabled supply current per amplifier enable = 4.8v l 1 m a i enable enable pin current enable = 0.3v l C110 m a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l 4.8 v output leakage current enable = 4.8v, v o = 1v l 1 m a t on turn-on time enable = 5v to 0v, r l = 1k l 300 ns t off turn-off time enable = 0v to 5v, r l = 1k l 72 m s sr slew rate a v = C1, r l = 1k, v o = C2v to 2v l 37 v/ m s LT6230-10, a v = C10, r l = 1k, v o = C2v to 2v l 260 v/ m s fpbw full power bandwidth (note 9) v out = 3v p-p l 3.9 mhz lt6230, lt6231, lt6232 the l denotes the specifications which apply over C40 c < t a < 85 c temperature range. v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted. (note 5) electrical characteristics
lt6230/LT6230-10/ lt6231/lt6232 10 sn623012 623012fas note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: inputs are protected by back-to-back diodes. if the differential input voltage exceeds 0.7v, the input current must be limited to less than 40ma. note 3: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 4: the lt6230c/lt6230i the lt6231c/lt6231i, and lt6232c/ lt6232i are guaranteed functional over the temperature range of C40 c and 85 c. note 5: the lt6230c/lt6231c/lt6232c are guaranteed to meet specified performance from 0 c to 70 c. the lt6230c/lt6231c/lt6232c are designed, characterized and expected to meet specified performance from C40 c to 85 c, but are not tested or qa sampled at these temperatures. the lt6230i/lt6231i/lt6232i are guaranteed to meet specified performance from C40 c to 85 c. note 6: matching parameters are the difference between the two amplifiers a and d and between b and c of the lt6232; between the two amplifiers of the lt6231. cmrr and psrr match are defined as follows: cmrr and psrr are measured in m v/v on the matched amplifiers. the difference is calculated between the matching sides in m v/v. the result is converted to db. note 7: minimum supply voltage is guaranteed by power supply rejection ratio test. note 8: output voltage swings are measured between the output and power supply rails. note 9: full-power bandwidth is calculated from the slew rate: fpbw = sr/2 p v p note 10: this parameter is not 100% tested. electrical characteristics temperature ( c) C50 input bias current ( a) 25 623012 go5 C25 0 50 10 9 8 7 6 5 4 3 75 100 125 v cm = 4v v cm = 1.5v v s = 5v, 0v typical perfor a ce characteristics uw v os distribution supply current vs supply voltage (per amplifier) offset voltage vs input common mode voltage input bias current vs common mode voltage input bias current vs temperature output saturation voltage vs load current (output low) (lt6230/lt6231/lt6232) input offset voltage ( v) C200 0 number of units 10 20 30 40 C100 0 100 200 623012 go1 50 100 90 80 70 60 C150 C50 50 150 v s = 5v, 0v v cm = v + /2 s8 total supply voltage (v) 0 supply current (ma) 6 623012 go2 24 8 6 5 4 3 2 1 0 10 12 14 t a = 125 c t a = 25 c t a = C55 c input common mode voltage (v) 0 offset voltage (mv) 1.5 623012 go3 0.5 1 2 2.0 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 345 2.5 3.5 4.5 t a = C55 c v s = 5v, 0v t a = 25 c t a = 125 c common mode voltage (v) C1 input bias current ( a) 2 623012 go4 01 3 14 12 10 8 6 4 2 C2 0 456 t a = 125 c t a = C55 c t a = 25 c v s = 5v, 0v load current (ma) 0.01 0.1 0.001 output saturation voltage (v) 0.01 10 1 100 10 623012 go6 0.1 1 v s = 5v, 0v t a = C55 c t a = 125 c t a = 25 c
11 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 typical perfor a ce characteristics uw output saturation voltage vs load current (output high) minimum supply voltage output short circuit current vs power supply voltage load current (ma) output saturation voltage (v) 623012 g07 0.01 0.1 0.01 10 1 100 10 0.001 0.1 1 v s = 5v, 0v t a = C55 c t a = 125 c t a = 25 c total supply voltage (v) 0 offset voltage (mv) 1.5 623012 g08 0.5 1 2 1.0 0.8 0.6 0.4 0.2 0 C0.2 C0.4 C0.6 C0.8 C1.0 345 2.5 3.5 4.5 t a = C55 c t a = 125 c t a = 25 c v cm = v s /2 power supply voltage ( v) 1.5 output short-circuit current (ma) 3 623012 go9 2 2.5 3.5 70 60 40 20 50 30 10 0 C20 C40 C70 C60 C10 C30 C50 4 4.5 5 t a = 125 c t a = C55 c t a = C55 c t a = 25 c sinking sourcing t a = 25 c t a = 125 c open loop gain open loop gain open loop gain offset voltage vs output current warm-up drift vs time total noise vs total source resistance output voltage (v) 0 input voltage (mv) 1.5 623012 g10 0.5 1 2 2.5 2.0 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 C2.5 3 2.5 r l = 100 r l = 1k v s = 3v, 0v t a = 25 c output voltage (v) 0 input voltage (mv) 1.5 623012 g11 0.5 1 2 0 345 2.5 3.5 4.5 r l = 100 r l = 1k v s = 5v, 0v t a = 25 c 2.5 2.0 1.5 1.0 0.5 C0.5 C1.0 C1.5 C2.0 C2.5 output voltage (v) C5 input voltage (mv) C2 623012 g12 C4 C3 C1 0 135 024 r l = 100 r l = 1k v s = 5v t a = 25 c 2.5 2.0 1.5 1.0 0.5 C0.5 C1.0 C1.5 C2.0 C2.5 output current (ma) C75 offset voltage (mv) 623012 g13 C45 C15 2.0 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 030 75 60 C60 C30 15 45 t a = C55 c t a = 125 c v s = 5v t a = 25 c time after power-up (s) 0 change in offset voltage ( v) 60 623012 g14 20 100 30 28 24 20 16 26 22 18 14 12 10 140 40 80 120 160 t a = 25 c v s = 5v v s = 2.5v v s = 1.5v source resistance ( ) 1 total noise (nv/ hz) 10 10 1k 10k 100k 623012 g15 0.1 100 100 v s = 2.5v v cm = 0v f = 100khz unbalanced source resistors total noise resistor noise amplifier noise voltage (lt6230/lt6231/lt6232)
lt6230/LT6230-10/ lt6231/lt6232 12 sn623012 623012fas typical perfor a ce characteristics uw noise voltage and unbalanced noise current vs frequency 0.1hz to 10hz output voltage noise gain bandwidth and phase margin vs temperature open loop gain vs frequency gain bandwidth and phase margin vs supply voltage slew rate vs temperature output impedance vs frequency common mode rejection ratio vs frequency channel separation vs frequency frequency (hz) noise voltage (nv/ hz) 6 5 4 3 2 1 0 10 1k 10k 100k 623012 g16 100 v s = 2.5v t a = 25 c v cm = 0v noise voltage noise current unbalanced noise current (pa/ hz) 6 5 4 3 2 1 0 temperature ( c) C55 gain bandwidth (mhz) 5 623012 g18 C25 35 240 220 200 180 140 160 phase margin (deg) 70 60 50 40 65 95 125 v s = 5v v s = 3v, 0v v s = 5v v s = 3v, 0v phase margin gain bandwidth c l = 5pf r l = 1k v cm = v s /2 frequency (hz) gain (db) 80 70 50 30 0 C10 60 40 10 20 C20 phase (db) 120 100 60 20 C60 80 40 C20 C40 0 C80 100k 10m 100m 1g 623012 g19 1m c l = 5pf r l = 1k v cm = v s /2 phase gain v s = 5v v s = 3v, 0v v s = 5v v s = 3v, 0v total supply voltage (v) 0 gain bandwidth (mhz) 6 623012 g20 24 8 220 240 200 180 140 160 phase margin (deg) 70 60 50 40 10 12 14 phase margin gain bandwidth t a = 25 c c l = 5pf r l = 1k temperature ( c) ?5 slew rate (v/ s) 5 623012 g21 ?5 ?5 45 90 100 110 120 80 70 50 20 30 60 40 85 25 65 105 125 v s = 5v falling v s = 2.5v rising a v = ? r f = r g = 1k v s = 5v rising v s = 2.5v falling frequency (hz) 1 output impedance ( ) 10 100k 10m 100m 623012 g22 0.01 0.1 1m 1k 100 v s = 5v, 0v a v = 10 a v = 1 a v = 2 frequency (hz) 20 common mode rejection ratio (db) 40 60 80 120 100 10k 100m 100k 1g 10m 623012 g23 0 1m v s = 5v, 0v v cm = v s /2 frequency (hz) 100k channel separation (db) C40 C50 C60 C70 C80 C90 C100 C110 C120 C130 C140 1m 10m 100m 623012 g24 a v = 1 t a = 25 c v s = 5v 5s/div 623012 g17 100nv 100nv/div C100nv v s = 2.5v (lt6230/lt6231/lt6232)
13 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 typical perfor a ce characteristics uw power supply rejection ratio vs frequency series output resistance and overshoot vs capacitive load series output resistance and overshoot vs capacitive load frequency (hz) 20 power supply rejection ratio (db) 40 60 80 120 100 1k 10k 100m 100k 10m 623012 g25 0 1m v s = 5v, 0v t a = 25 c v cm = v s /2 negative supply positive supply output step (v) C4 settling time (ns) 0 623012 g28 C3 C2 C1 1 100 200 150 50 0 234 1mv 10mv 1mv 10mv v s = 5v t a = 25 c a v = 1 + C 500 v out v in settling time vs output step (non-inverting) settling time vs output step (inverting) maximum undistorted output signal vs frequency distortion vs frequency distortion vs frequency distortion vs frequency output step (v) C4 settling time (ns) 0 623012 g29 C3 C2 C1 1 200 150 0 50 100 234 1mv 10mv 1mv 10mv v s = 5v t a = 25 c a v = C1 + C 500 500 v out v in capacitive load (pf) 10 overshoot (%) 50 45 40 35 30 25 20 15 10 5 0 100 1000 623012 g26 v s = 5v, 0v a v = 1 r s = 10 r s = 20 r s = 50 r l = 50 capacitive load (pf) 10 overshoot (%) 50 45 40 35 30 25 20 15 10 5 0 100 1000 623012 g27 v s = 5v, 0v a v = 2 r s = 10 r s = 20 r s = 50 r l = 50 frequency (hz) 10k output voltage swing (v pCp ) 10 9 8 7 6 5 4 3 2 100k 1m 10m 623012 g30 v s = 5v t a = 25 c hd 2 , hd 3 < C40dbc a v = C1 a v = 2 frequency (hz) 10k distortion (dbc) C40 C50 C60 C70 C80 C90 C100 100k 1m 10m 623012 g31 v s = 2.5v a v = 1 v out = 2v (pCp) r l = 100 , 3rd r l = 1k, 3rd r l = 100 , 2nd r l = 1k, 2nd frequency (hz) 10k distortion (dbc) C40 C50 C60 C70 C80 C90 C100 100k 1m 10m 623012 g32 v s = 5v a v = 1 v out = 2v (pCp) r l = 100 , 3rd r l = 1k, 3rd r l = 1k, 2nd r l = 100 , 2nd frequency (hz) 10k distortion (dbc) C40 C50 C60 C70 C80 C90 C100 100k 1m 10m 623012 g33 v s = 2.5v a v = 2 v out = 2v (pCp) r l = 100 , 3rd r l = 1k, 3rd r l = 1k, 2nd r l = 100 , 2nd (lt6230/lt6231/lt6232)
lt6230/LT6230-10/ lt6231/lt6232 14 sn623012 623012fas typical perfor a ce characteristics uw large signal response small signal response distortion vs frequency large signal response output overdrive recovery supply current vs enable pin voltage enable pin current vs enable pin voltage enable pin response time pin voltage (v) supply current (ma) C1.0 623012 g39 C2.0 0 4.5 4.0 3.5 3.0 2.5 2.0 1.0 0.5 1.5 0 1.0 2.0 v s = 2.5v t a = 125 c t a = 25 c t a = C55 c pin voltage (v) enable pin current ( a) 623012 g40 30 25 20 15 10 5 0 t a = 125 c v s = 2.5v a v = 1 t a = 25 c t a = C55 c C1.0 C2.0 0 1.0 2.0 frequency (hz) 10k distortion (dbc) C40 C50 C60 C70 C80 C90 C100 100k 1m 10m 623012 g34 v s = 5v a v = 2 v out = 2v (pCp) r l = 100 , 3rd r l = 1k, 2nd r l = 100 , 2nd r l = 1k, 3rd (lt6230/lt6231/lt6232) v s = 2.5v 100 m s/div v in = 0.5v a v = 1 r l = 1k 623345 g41 0.5v 5v 0v 0v v out enable pin v in (1v/div) v s = 2.5v 200ns/div a v = 3 623345 g38 0v 0v v out (2v/div) 2v/div v s = 5v 200ns/div a v = 1 r l = 1k 623345 g37 0v C5v 5v 50mv/div v s = 2.5v 200ns/div a v = 1 r l = 1k 623345 g36 0v 1v/div v s = 2.5v 200ns/div a v = C1 r l = 1k 623345 g35 C2v 2v 0v (lt6230) enable characteristics
15 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 temperature ( c) ?5 slew rate (v/ s) 5 623012 g43 ?5 ?5 45 450 500 550 600 400 350 250 100 150 300 200 85 25 65 105 125 v s = 5v falling v s = 2.5v rising a v = ?0 r f = 1k r g = 100 v s = 5v rising v s = 2.5v falling typical perfor a ce characteristics uw gain bandwidth and phase margin vs temperature slew rate vs temperature series output resistor and overshoot vs capacitive load open loop gain and phase vs frequency gain bandwidth and phase margin vs supply voltage gain bandwidth vs resistor load common mode rejection ratio vs frequency maximum undistorted output signal vs frequency 2 nd and 3 rd harmonic distortion vs frequency temperature ( c) C50 gain bandwidth (mhz) 25 623012 g42 C25 0 50 1700 1500 1300 1100 900 phase margin (deg) 70 80 60 50 40 75 100 125 v s = 5v v s = 3v, 0v v s = 5v v s = 3v, 0v phase margin gain bandwidth a v = 10 frequency (hz) gain (db) 90 80 70 60 50 40 30 20 10 0 C10 phase (deg) 120 100 80 60 40 20 0 C20 C40 C60 C80 100k 10m 100m 1g 623012 g45 1m a v = 10 c l = 5pf r l = 1k v cm = v s /2 v s = 3v, 0v v s = 5v phase gain v s = 5v v s = 3v, 0v total supply voltage (v) 0 gain bandwidth (mhz) 6 623012 g46 24 8 1700 1450 1200 950 phase margin (deg) 100 50 0 10 12 phase margin gain bandwidth t a = 25 c a v = 10 c l = 5pf r l = 1k total resistor load ( ) (includes feedback r) 0 gain bandwidth (mhz) 600 623012 g47 200 400 800 1600 1400 1200 800 600 400 200 0 1000 1000 a v = 10 v s = 5v t a = 25 c r f = 1k r g = 100 frequency (hz) 20 common mode rejection ratio (db) 40 60 80 120 100 10k 1g 100m 100k 10m 623012 g48 0 1m v s = 5v, 0v v cm = v s /2 frequency (hz) 10k output voltage swing (v pCp ) 10 9 8 7 6 5 4 3 2 1 0 100k 1m 100m 10m 623012 g49 v s = 5v t a = 25 c a v = 10 hd 2 = hd 3 40dbc frequency (hz) 10k distortion (dbc) C40 C50 C60 C70 C80 C90 C100 100k 1m 10m 623012 g50 v s = 2.5v a v = 10 v out = 2v (pCp) r l = 100 , 3rd r l = 100 , 2nd r l = 1k, 3rd r l = 1k, 2nd capacitive load (pf) 10 overshoot (%) 70 60 50 40 30 20 10 0 100 1000 10000 623012 g44 v s = 5v, 0v a v = 10 r s = 10 r s = 20 r s = 50 (LT6230-10)
lt6230/LT6230-10/ lt6231/lt6232 16 sn623012 623012fas typical perfor a ce characteristics uw 2 nd and 3 rd harmonic distortion vs frequency large signal response output-overload recovery small signal response input referred high frequency noise spectrum v s = 5v 100ns/div a v = 10 r f = 900 w , r g = 100 w 623345 g52 0v v out (2v/div) v s = 5v, 0v 100ns/div a v = 10 r f = 900 w , r g = 100 w 623345 g53 0v v out (2v/div) 0v v in (0.5v/div) v s = 5v, 0v 100ns/div a v = 10 r f = 900 w , r g = 100 w 623345 g54 2.5v v out (100mv/div) frequency (hz) 10k distortion (dbc) C40 C50 C60 C70 C80 C90 C100 100k 1m 10m 623012 g51 v s = 5v a v = 10 v out = 2v (pCp) r l = 100 , 3rd r l = 100 , 2nd r l = 1k, 2nd r l = 1k, 3rd (LT6230-10) 100khz 50mhz 5mhz/div 623345 g55 1nv/ ? hz/div 10 0
17 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 input protection there are back-to-back diodes, d1 and d2 across the + and C inputs of these amplifiers to limit the differential input voltage to 0.7v. the inputs of the lt6230/lt6231/ lt6232 do not have internal resistors in series with the input transistors. this technique is often used to protect the input devices from over voltage that causes excessive current to flow. the addition of these resistors would significantly degrade the low noise voltage of these ampli- fiers. for instance, a 100 w resistor in series with each input would generate 1.8nv/ ? hz of noise, and the total amplifier noise voltage would rise from 1.1nv/ ? hz to 2.1nv/ ? hz. once the input differential voltage exceeds 0.7v, steady state current conducted through the protec- tion diodes should be limited to 40ma. this implies 25 w of protection resistance is necessary per volt of overdrive beyond 0.7v. these input diodes are rugged enough to applicatio s i for atio wu u u amplifier characteristics figure 1 is a simplified schematic of the lt6230/lt6231/ lt6232, which has a pair of low noise input transistors q1 and q2. a simple current mirror q3/q4 converts the differential signal to a single-ended output, and these transistors are degenerated to reduce their contribution to the overall noise. capacitor c1 reduces the unity cross frequency and improves the frequency stability without degrading the gain bandwidth of the amplifier. capacitor c m sets the overall amplifier gain bandwidth. the differential drive generator supplies current to transistors q5 and q6 that swing the output from rail-to-rail. handle transient currents due to amplifier slew rate over- drive and clipping without protection resistors. the photo of figure 2 shows the output response to an input overdrive with the amplifier connected as a voltage follower. with the input signal low, current source i 1 saturates and the differential drive generator drives q6 into saturation so the output voltage swings all the way to v C . the input can swing positive until transistor q2 satu- rates into current mirror q3/q4. when saturation occurs, the output tries to phase invert, but diode d2 conducts current from the signal source to the output through the feedback connection. the output is clamped a diode drop below the input. in this photo, the input signal generator is limiting at about 20ma. with the amplifier connected in a gain of a v 3 2, the output can invert with very heavy overdrive. to avoid this inver- sion, limit the input overdrive to 0.5v beyond the power supply rails. esd the lt6230/lt6231/lt6232 have reverse-biased esd protection diodes on all inputs and outputs as shown in figure 1. if these pins are forced beyond either supply, unlimited current will flow through these diodes. if the current is transient and limited to one hundred milliamps or less, no damage to the device will occur. noise the noise voltage of the lt6230/lt6231/lt6232 is equiva- lent to that of a 75 w resistor, and for the lowest possible noise it is desirable to keep the source and feedback resistance at or below this value, i.e. r s + r g ||r fb 75 w . figure 2. v s = 2.5v, a v = 1 with large overdrive 1v/div 500 m s/div 623012 f02 C2.5v 2.5v 0v figure 1. simplified schematic enable desd6 desd5 Cv +v +v in Cv in +v 623012 f01 bias differential drive generator v out +v c m i 1 Cv desd3 Cv Cv desd4 +v desd1 Cv desd2 +v d1 c1 d2 q5 q6 q4 q2 q3 q1
lt6230/LT6230-10/ lt6231/lt6232 18 sn623012 623012fas applicatio s i for atio wu u u with r s + r g ||r fb = 75 w the total noise of the amplifier is: e n = ? (1.1nv) 2 +(1.1nv) 2 = 1.55nv/ ? hz below this resistance value, the amplifier dominates the noise, but in the region between 75 w and about 3k, the noise is dominated by the resistor thermal noise. as the total resistance is further increased beyond 3k, the ampli- fier noise current multiplied by the total resistance even- tually dominates the noise. the product of e n ? ? i supply is an interesting way to gauge low noise amplifiers. most low noise amplifiers with low e n have high i supply current. in applications that require low noise voltage with the lowest possible supply current, this product can prove to be enlightening. the lt6230/ lt6231/lt6232 have an e n ? ? i supply product of only 1.9 per amplifier, yet it is common to see amplifiers with similar noise specifications to have e n ? ? i supply as high as 13.5. for a complete discussion of amplifier noise, see the lt1028 data sheet. enable pin the lt6230 includes an enable pin that shuts down the amplifier to 10 m a maximum supply current. the enable pin must be driven high to within 0.35v of v + to shut down the supply current. this can be accomplished with simple gate logic; however care must be taken if the logic and the lt6230 operate from different supplies. if this is the case, then open drain logic can be used with a pull-up resistor to ensure that the amplifier remains off. see typical characteristic curves. the output leakage current when disabled is very low; however, current can flow into the input protection diodes d1 and d2 if the output voltage exceeds the input voltage by a diode drop.
19 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 + C r2 732 r4 10k c3 0.1 f en lt6230 f 0 = 1 = 1mhz c = c 1 c 2 , r = r1 = r2 f 0 = ( 732 ) mhz, maximum f 0 = 1mhz f C3db = f 0 a v = 20db at f 0 e n = 4 v rms input referred i s = 3.7ma for v + = 5v 623012 f03 0.1 f c2 47pf c1 1000pf r3 10k r1 732 v out v + v in 2 rc r 2.5 applicatio s i for atio wu u u single supply, low noise, low power, bandpass filter with gain = 10 low noise, low power, single supply, instrumentation amplifier with gain = 100 + C r14 2k en u3 lt6230 v out = 100 (v in2 C v in1 ) gain = ( r2 + 1 ) ( r10 ) input resistance = r5 = r6 f C3db = 310hz to 11mhz e n = 20 v rms input referred i s = 10.5ma for v s = 5v, 0v 623012 f05 c8 68pf c3 1 f r13 2k r10 511 r15 88.7 r16 88.7 r4 511 r3 30.9 r1 30.9 r2 511 v out v in1 v in2 v + r1 r15 c9 68pf r12 511 + C en u2 LT6230-10 v + c1 1 f c2 2200pf + C en u1 LT6230-10 v + r5 511 r6 511 c4 10 f r1 = r3 r2 = r4 r10 = r12 r15 = r16 frequency (hz) 100k gain (db) 23 3 C7 1m 10m 623012 f04 frequency response plot of bandpass filter
lt6230/LT6230-10/ lt6231/lt6232 20 sn623012 623012fas s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) 1.50 ?1.75 (note 4) 2.80 bsc 0.30 ?0.45 6 plcs (note 3) datum ? 0.09 ?0.20 (note 3)
21 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698) 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.38 0.10 bottom view?xposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ?0.05 (dd8) dfn 1203 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc u package descriptio
lt6230/LT6230-10/ lt6231/lt6232 22 sn623012 623012fas s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 ?.050 (0.406 ?1.270) .010 ?.020 (0.254 ?0.508) 45 0 ?8 typ .008 ?.010 (0.203 ?0.254) so8 0303 .053 ?.069 (1.346 ?1.752) .014 ?.019 (0.355 ?0.483) typ .004 ?.010 (0.101 ?0.254) .050 (1.270) bsc 1 2 3 4 .150 ?.157 (3.810 ?3.988) note 3 8 7 6 5 .189 ?.197 (4.801 ?5.004) note 3 .228 ?.244 (5.791 ?6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) u package descriptio
23 sn623012 623012fas lt6230/LT6230-10/ lt6231/lt6232 package descriptio u gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ?.244 (5.817 ?6.198) .150 ?.157** (3.810 ?3.988) 16 15 14 13 .189 ?.196* (4.801 ?4.978) 12 11 10 9 .016 ?.050 (0.406 ?1.270) .015 .004 (0.38 0.10) 45 0 ?8 typ .007 ?.0098 (0.178 ?0.249) .0532 ?.0688 (1.35 ?1.75) .008 ?.012 (0.203 ?0.305) typ .004 ?.0098 (0.102 ?0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ?.165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
lt6230/LT6230-10/ lt6231/lt6232 24 sn623012 623012fas linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com ? linear technology corporation 2003 lt/tp 0304 1k rev a ? printed in usa related parts part number description comments lt1028 single, ultra low noise 50mhz op amp 0.85nv/ ? hz lt1677 single, low noise rail-to-rail amplifier 3v operation, 2.5ma, 4.5nv/ ? hz, 60 m v max v os lt1806/lt1807 single/dual, low noise 325mhz rail-to-rail amplifier 2.5v operation, 550 m v max v os , 3.5nv/ ? hz lt6200/lt6201 single/dual, low noise 165mhz 0.95nv ? hz, rail-to-rail input and output lt6202/lt6203/lt6204 single/dual/quad, low noise, rail-to-rail amplifier 1.9nv/ ? hz, 3ma max, 100mhz gain bandwidth photodiode amplifier time domain response low power avalanche photodiode transimpedance amplifier i s = 3.3ma 30mv/div 50ns/div 623012 ta02b + C r1 1.5k r2 1.5k c2 0.1 f 5v C5v enable lt6230 200v bias advanced photonix 012-70-62-541 www.advancedphotonix.com 623012 ta02a c1 4.7pf output offset = 500 v typical bandwidth = 20mhz output noise = 1.1mv pCp (100mhz measurement bw) typical applicatio s u the lt6230 is applied as a transimpedance amplifier with an i-to-v conversion gain of 1.5k w set by r1. the lt6230 is ideally suited to this application because of its low input offset voltage and current, and its low noise. this is be- cause the 1.5k resistor has an inherent thermal noise of 5nv/ ? hz or 3.4pa/ ? hz at room temperature, while the lt6230 contributes only 1.1nv and 2.4pa / ? hz. so, with respect to both voltage and current noises, the lt6230 is actually quieter than the gain resistor. the circuit uses an avalanche photodiode with the cathode biased to approximately 200v. when light is incident on the photodiode, it induces a current i pd which flows into the amplifier circuit. the amplifier output falls negative to maintain balance at its inputs. the transfer function is therefore v out = Ci pd ? 1.5k. c1 ensures stability and good settling characteristics. output offset was measured at 280 m v, so low in part because r2 serves to cancel the dc effects of bias current. output noise was measured at 1.1mv pCp on a 100mhz measurement bandwidth, with c2 shunting r2s thermal noise. as shown in the scope photo, the rise time is 17ns, indicating a signal bandwidth of 20mhz.

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